Short channel effects are getting more significant as planar semiconductor devices are increasingly being scaled down. To this end, three-dimensional (3D) semiconductor devices, such as Fin Field Effect Transistors (FinFETs), have been proposed. Generally, a FinFET includes a fin formed vertically on a substrate and a gate stack intersecting the fin.
Particularly, in a bulk FinFET (i.e., a FinFET formed on a bulk semiconductor substrate, which has a fin formed from the bulk semiconductor substrate and thus physically connected to the bulk semiconductor substrate), there may be leakage between source and drain regions via a portion of the substrate beneath the fin (or a sub-fin portion), which is also referred to as punch-through. Generally, a punch-through stopper (PTS) layer may be formed (beneath the fin) by ion implantation and/or thermal diffusion. An ideal PTS layer should not introduce dopants into the fin, while enabling the sub-fin portion to fully deplete.
However, it is difficult in the art to form a PTS layer having an abrupt distribution (i.e., from a nearly zero dopant concentration in the fin to a high-dopant concentration in the sub-fin portion).